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Govt Expands Chip Design Access for Universities Nationwide

2025-12-01

The Government of India has taken another major step toward building a broad-based semiconductor ecosystem by opening industry-grade design and fabrication resources to universities across the country. As part of this push, Union Minister for Electronics & Information Technology Ashwini Vaishnaw handed over 28 chips—comprising 600 bare dies and 600 packaged units—designed by students from 17 academic institutions under the Chips to Start-up (C2S) Programme. The chips were fabricated at the Semiconductor Laboratory (SCL) in Mohali, where the Minister reviewed ongoing modernisation works on 28 November 2025.

Ashwini Vaishnaw said India is rapidly positioning itself as a distinctive player in the global semiconductor arena, supported by unprecedented access to advanced Electronic Design Automation (EDA) tools for higher education institutions. He noted that India now hosts a unique, large-scale semiconductor development ecosystem in which universities can work with the same design platforms used by leading global chipmakers, fostering an environment where students can innovate at an industry-ready level.

As part of the ceremony, officials highlighted the number of academic organisations in each state that have been equipped with EDA tools through the C2S initiative, reflecting the programme’s expanding nationwide footprint.

The Director General of SCL and the laboratory team also presented a detailed overview of the chip design-to-fabrication workflow adopted for the C2S Programme. The process leverages close collaboration between SCL and the ChipIN Centre to provide end-to-end support—from design validation to Multi-Project Wafer (MPW) fabrication services—enabling students to translate their concepts into functional silicon.

The initiative underscores the government’s aim to democratise semiconductor talent development and ensure India’s universities become active contributors to the country’s chip innovation pipeline.

News source: PIB

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